Book

1. Automatisierte Analyse von virtuellen Prototypen auf der Ebene elektronischer Systeme | Design, Verständnis und Anwendungen Springer Link
   Mehran Goli, Rolf Drechsler
   Springer, 2023


2. Automated Analysis of Virtual Prototypes at the Electronic System Level: Design Understanding and Applications Springer Link
   Mehran Goli, Rolf Drechsler
   Springer, 2020

Journal

1. Early SoCs Information Flow Policies Validation using SystemC-based Virtual Prototypes at the ESL
   Mehran Goli, Rolf Drechsler
   ACM Transactions on Embedded Computing Systems (TECS), 2022 ACM Link


2. Through the Looking Glass: Automated Design Understanding of SystemC-based VPs at the ESL
   Mehran Goli, Rolf Drechsler
   IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2021 IEEE Link


3. PREASC: Automatic Portion Resilience Evaluation for Approximating SystemC-based Designs using Regression Analysis Techniques
   Mehran Goli, Rolf Drechsler
   ACM Transactions on Design Automation of Electronic Systems (TODAES), 2020 ACM Link


4. Automated Non-intrusive Analysis of Electronic System Level Designs IEEE Link
   Mehran Goli, Jannis Stoppe, Rolf Drechsler
   IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2020


5. Security Validation of VP-based SoCs Using Dynamic Information Flow Tracking RG Link
   Mehran Goli, Muhammad Hassan, Daniel Große, Rolf Drechsler
   it-Information Technology, 2019

Conference

1. FELOPi: A Framework for Simulation and Evaluation of Post-Layout File Against Optical Probing PDF
   Sajjad Parvin, Mehran Goli, Frank Sill Torres, Rolf Drechsler
   Design, Automation and Test in Europe Conference (DATE), 2023


2. LAT-UP: Exposing Layout-Level Analog Hardware Trojans Using Contactless Optical Probing PDF
   Sajjad Parvin, Mehran Goli, Frank Sill Torres, Rolf Drechsler
   IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2023, (Best Paper Award)


3. Efficient ML-Based Performance Estimation Approach across Different Microarchitectures for RISC-V Processors PDF
   Weiyan Zhang, Mehran Goli, Muhammad Hassan, Rolf Drechsler
   Euromicro Conference Series on Digital System Design (DSD), 2023


4. Efficient Binary Decision Diagram Manipulation by Reducing the Number of Intermediate Nodes PDF
   Rune Krauss, Mehran Goli, Rolf Drechsler
   International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), 2023


5. VAST: Validation of VP-based Heterogeneous Systems against Availability Security Properties using Static Information Flow Tracking PDF
   Ece Nur Demirhan Coskun, Muhammad Hassan, Mehran Goli, Rolf Drechsler
   International Symposium on Quality Electronic Design (ISQED), 2023


6. Polynomial Formal Verification of a Processor: A RISC-V Case Study PDF
   Lennart Weingarten, Alireza Mahzoon, Mehran Goli, Rolf Drechsler
   International Symposium on Quality Electronic Design (ISQED), 2023


7. Fast and Accurate: Machine Learning Techniques for Performance Estimation of CNNs for GPGPUs PDF
   Christopher Metz, Mehran Goli, Rolf Drechsler
   IEEE International Parallel and Distributed Processing Symposium (IPDPS), 2023


8. EDDY: A Multi-Core BDD Package With Dynamic Memory Management and Reduced Fragmentation PDF
   Rune Krauss, Mehran Goli, Rolf Drechsler
   Asia and South Pacific Design Automation Conference (ASP-DAC), 2023


9. Trojan-D2: Post-Layout Design and Detection of Stealthy Hardware Trojans - a RISC-V Case Study PDF
   Sajjad Parvin, Mehran Goli, Frank Sill Torres, Rolf Drechsler
   Asia and South Pacific Design Automation Conference (ASP-DAC), 2023


10. ANN-based Performance Estimation of Embedded Software for RISC-V Processors PDF
    Weiyan Zhang, Mehran Goli, Rolf Drechsler
    International Symposium on Rapid System Prototyping (RSP), 2022


11. Towards Neural Hardware Search: Power Estimation of CNNs for GPGPUs with Dynamic Frequency Scaling PDF
    Christopher Metz, Mehran Goli, Rolf Drechsler
    ACM/IEEE Workshop on Machine Learning for CAD (MLCAD), 2022


12. Early Performance Estimation of Embedded Software on RISC-V Processor using Linear Regression PDF
    Weiyan Zhang, Mehran Goli, Rolf Drechsler
    International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), 2022


13. ML-based Power Estimation of Convolutional Neural Networks on GPGPUs PDF
    Christopher Metz, Mehran Goli, Rolf Drechsler
    International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), 2022


14. Towards Polynomial Formal Verification of Complex Arithmetic Circuits PDF
    Rolf Drechsler, Alireza Mahzoon, Mehran Goli
    International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), 2022


15. Early Validation of SoCs Security Architecture Against Timing Flows Using SystemC-based VPs PDF
    Mehran Goli, Rolf Drechsler
    International Conference on Computer Aided Design (ICCAD), 2021


16. VIP-VP: Early Validation of SoCs Information Flow Policies using SystemC-based Virtual Prototypes PDF
    Mehran Goli, Rolf Drechsler
    Forum on Specification and Design Languages (FDL), 2021, (Best Paper Award)


17. Work-in-Progress: Early Power Estimation of CUDA-based CNNs on GPGPUs
    Christopher Metz, Mehran Goli, Rolf Drechsler
    International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), 2021


18. Automated Debugging-Aware Visualization Technique for SystemC HLS Designs PDF
    Mehran Goli, Alireza Mahzoon, Rolf Drechsler
    Euromicro Conference on Digital System Design (DSD), 2021


19. ATLaS: Automatic Detection of Timing-based Information Leakage Flows for SystemC HLS Designs PDF
    Mehran Goli, Rolf Drechsler
    Asia and South Pacific Design Automation Conference (ASP-DAC), 2021


20. ASCHyRO: Automatic Fault Localization of SystemC HLS Designs Using a Hybrid Accurate Rank Ordering Technique PDF Video
    Mehran Goli, Alireza Mahzoon, Rolf Drechsler
    IEEE International Conference on Computer Design (ICCD), 2020


21. Automated Design Understanding of SystemC-based Virtual Prototypes: Data Extraction, Analysis and Visualization PDF Video
    Mehran Goli, Rolf Drechsler
    IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2020


22. Towards Generation of a Programmable Power Management Unit at the Electronic System Level PDF
    David Lemma, Mehran Goli, Daniel Große, Rolf Drechsler
    International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), 2020


23. Scalable Simulation-based Verification of SystemC-based Virtual Prototypes PDF
    Mehran Goli, Rolf Drechsler
    EUROMICRO Digital System Design Conference (DSD), 2019


24. Automated Analysis of Virtual Prototypes at Electronic System Level PDF
    Mehran Goli, Muhammad Hassan, Daniel Große, Rolf Drechsler
    ACM Great Lakes Symposium on VLSI (GLSVLSI), 2019


25. Power Intent from Initial ESL Prototypes: Extracting Power Management Parameters PDF
    David Lemma, Mehran Goli, Daniel Große, Rolf Drechsler
    Nordic Circuits and Systems Conference (NORCAS), 2018


26. Resilience Evaluation for Approximating SystemC Designs Using Machine Learning Techniques PDF
    Mehran Goli, Jannis Stoppe, Rolf Drechsler
    International Symposium on Rapid System Prototyping (RSP), 2018


27. Automatic Protocol Compliance Checking of SystemC TLM-2.0 Simulation Behavior Using Timed Automata PDF
    Mehran Goli, Jannis Stoppe, Rolf Drechsler
    International Conference on Computer Design (ICCD), 2017


28. Automatic Equivalence Checking for SystemC-TLM 2.0 Models Against their Formal Specifications PDF
    Mehran Goli, Jannis Stoppe, Rolf Drechsler
    Design, Automation and Test in Europe (DATE), 2017


29. AIBA: an Automated Intra-Cycle Behavioral Analysis for SystemC-based Design Exploration PDF
    Mehran Goli, Jannis Stoppe, Rolf Drechsler
    International Conference on Computer Design (ICCD), 2016


30. Application-specific power-aware mapping for reconfigurable NoC architectures IEEE Link
    Mehran Goli, Amin Ghasemazar, Zainalabedin Navabi
    International Conference on Design and Technology of Integrated Systems in Nanoscale Era (DTIS), 2015


31. Embedded Complex Floating Point Hardware Accelerator IEEE Link
    Amin Ghasemazar, Mehran Goli, Ali Afzali-Kusha
    International Conference on VLSI Design (VLSI Design), 2014

Workshop

1. Simulation-based Verification of SystemC-based VPs at the ESL PDF
   Mehran Goli, Rolf Drechsler
   Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2022


2. Pick the Right Edge Device: Towards Power and Performance Estimation of CUDA-based CNNs on GPGPUs PDF
   Christopher Metz, Mehran Goli, Rolf Drechsler
   Heterogeneous Architectures (SLOHA) – DATE Workshop, 2020


3. Integrating Hybrid Analysis with Machine Learning Techniques for Portion Resilience Evaluation in Approximating SystemC-based Designs
   Mehran Goli, Rolf Drechsler
   Workshop on Machine Learning for CAD (MLCAD), 2019